Vedic mathematics is centered on sixteen aphorisms/ Formulae and thirteen sub- aphorisms/ Formulae that touch almost all different chapters of mathematics. Out of these sutras, Dwandwayoga has a duplex property used to find a square of a number. This paper proposes a 32 nm technology-based optimized squaring circuit using the Vedic sutra in physical layout. The consequences are matched through an orthodox multipliers circuitry in addition to a Vedas multipliers circuitry that was premeditated by means of the Urdhvatiryagbhyam formulae. These proposed architecture shows a 94.41% improvement in power consumption over the conventional multiplier and shows 76.34% more than the Vedic multiplier. It also shows a remarkable 66.03% improvement in energy deferral product equated towards the Vedas multipliers and a 96.13% improvement than a conventional multiplier.

Vedic mathematics, Dwandwayoga, square circuit, Vedic multiplier