In this study, the problems of Gate All Around Field Effect Transistor (GAAFET) mainly its degradation parameters like short-channel metrics and leakage current in channels are discussed. It may be minimized by making some changes in fabrication of GAAFET on Silicon based semiconductor. SCE is a phenomenon that occurs in FETs with small gate lengths, where the gate controls the flow of current in a very narrow channel. At this scale, quantum mechanical effects become important, and the channel resistance increases, causing the drain current to decrease. This can be problematic for high-speed circuits, where a large current is required. One way to mitigate this effect is to use etching to create a recessed channel, which can help reduce the channel resistance and improve device performance. Etching can potentially decrease short channel issue in a FET, but its effect on leakage current depends on the specific etching method used and the properties of the FET itself. The changes are focused in etching on atomic layer of material based on Thermal characteristics such as earth-metals, metal-based oxides, semiconductor and their oxide-metals. The framework of this study is to expose basic principles on changes in the thermodynamic parameters of base-metal and corresponding response on their thermal metrics of earth-metal during etching procedure. In this type of etching process, a layer of minimum (Nano- meter) width layer of earth-metal is removed from base-metal using Atomic sized approach. This will be completed on self-timed sequential way for having a Self-control and self-saturation on the processed earth-metals. Various methodology of etching of earth-metals is reviewed and corresponding pros and cons is evaluated.

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