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Bimonthly Since 1986 |
ISSN 1004-9037
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Publication Details |
Edited by: Editorial Board of Journal of Data Acquisition and Processing
P.O. Box 2704, Beijing 100190, P.R. China
Sponsored by: Institute of Computing Technology, CAS & China Computer Federation
Undertaken by: Institute of Computing Technology, CAS
Published by: SCIENCE PRESS, BEIJING, CHINA
Distributed by:
China: All Local Post Offices
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09 May 2023, Volume 38 Issue 3
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Abstract
The creation and execution of the Turbo encoder are the primary subject matter of this essay. It functions as an integrated module in the chip for the in-vehicle system. A field-programmable gate array was used to make this encoder module. There are two ways utilised for encoding calculations in both serial and parallel fashion. These two design approaches are looked into. This leads us to the conclusion that two significant milestones are accomplished by adopting parallel approach for calculating in addition to CIA. Chip size and processing speed are the main and second factors, respectively. Both have gotten bigger. This has improved the reasoning application much more. Xilinx tools were used to design the Turbo encoder module. It was synthesised and simulated. The Xilinx vertex Low Power is utilised. The main purpose of the Turbo encoder module and in-vehicle system chip is to create a single programmable device.
Keyword
Turbo encoder module, In vehicle system, serial computation, parallel computation and carry increment adder
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