We present a method of generating test cases from the software specifications which are modeled by nondeterministic finite state machines. It is applicable to both nondeterministic and deterministic finite state machines. When applied to deterministic machines, this method yields usually smaller test suites with full fault coverage than the existing methods that also assure full fault coverage. In particular, the proposed mehod can be used to test the control portion of software specified in the formal…

The highlevel Compiler Intermediate Language CIL is a generalpurpose descripotion language of parallel graph rewriting computational model intended for parallelimplementatioll of declarative languages on multiprocessor systems. In this paper, wefirst outline a new Hybrid Execution Model(HEM) and corresponding parallel abstract machine PAM/TGR based on Extended parallel Graph Rewriting ComputationalModel EGRCM for implementing CIL language on distributed memory multiprocessorsystems. Then we focus on the com…

Decompiling, as a means of analysing and understanding software, has great practical value. This paper presents a kind of decompiling method offered by the authors,in which the techniques of library-function pattern recognition, intermediate language,symbolic execution, rule-based 4ata type recovery program transformation, and knowledge engineering are separately aPPlied to diIfernt phases of decompiling. Then it is discussed that the techulques of developing expert systems are adopted to build a decompilin…

In this paper we discuss the learning convergence of the cerebellar model articulation controller (CMAC) in cyclic learning. We prove the following results. First, if the training samples are noiseless, the training algorithm converges if and only if the learning rate is chosen from (0, 2). Second, when the training samples have noises, the learning algorithm will converge with a probability of one if the learning rate is dynandcally decreased. Third, in the case with noises, with a small but fixed learnin…

This paPer addresses the issue of building a case-based preliminary design system by using Hopfield networks. one limitation of Hopfield networks is that it cannot be tralned, i.e. the weights between two neurons must be set in advance. A pattern stored in Hopfield networks cannot be recalled if the pattern is not a local minimum.Two concepts are proposed to deal with this problem. They are the multiple training encoding method and the puppet encoding method. The multiple training encoding method, which gua…

UniECAD is an integrated electronic CAD system, the user interfaCe develotwent system is the key of the integration of UniECAD. This paper presents the architecture of GUIDS, a graphical user interface development system in UniECAD, and then discusses a series of new techniques and methods in the design and the implementation of this system around the following aspects: the editing environment of interface elements, the implementation of dialogue control and the automatic generation of interface code. As an…

The performance analysis of VLSI integrated circuits (ICs) with llat tools is slow and even sometimes impossible to complete. Some hierarchical tools have been developed to speed up the analysis of these large ICs. However, these hierarchical tools suffe from a poor interaction with the CAD database and poorly automatized operations. We introduce a general hierarchical framework for performance analysis to solve these problems. The circuit analysis is automatic under the proposed framework. Information that…

Based on the characteristics of distrubuted system and the behavior of parallelprograms, this paper presents the fixed and randofored competitive memory coherence algorithms for distributed shared virtual memory These algorithms exploit parallel programs' locality of reference and dribit good competitive property Our simulation shows that the fixed and randomized algorithms achieve better performance and higher stability than other strategies such as write-invalldate and write-update.

BTM is a new And/Or parallel execution model for logic programs which exploits both full orparallelism and restricted Andparallelism. The advantages of high parallelism and low rtm time cost make BTJ, an exPerhoental execution system of BTM implemented on a nonsharedmemory multiprocessor system, achieve significant speedup for both And-parallel and Or-parallel logic Programs.