Bimonthly    Since 1986
ISSN 1004-9037
Indexed in:
Publication Details
Edited by: Editorial Board of Journal of Data Acquisition and Processing
P.O. Box 2704, Beijing 100190, P.R. China
Sponsored by: Institute of Computing Technology, CAS & China Computer Federation
Undertaken by: Institute of Computing Technology, CAS
Distributed by:
China: All Local Post Offices
  • Table of Content
      10 October 1986, Volume 1 Issue 4   
    For Selected: View Abstracts Toggle Thumbnails
    An Effective Test Generation Algorithm for Combinational Circuits
    Wang Jianchao; Wei Daozheng;
    Journal of Data Acquisition and Processing, 1986, 1 (4): 1-16. 
    Abstract   PDF(726KB) ( 1189 )  
    In this paper,an analysis of backtrack behavior in PODEM(the test generation algorithmfor combinational circuits presented by P.Goel)is given.It is pointed out that there are stillmany unnecessary backtracks in PODEM on some occasions.A new test generation algorithmnamed IPODEM is therefore proposed in this paper.IPODEM is an improvement over PODEMwith emphasis on backtrack of decision tree.A new backtrack approach is developed in thisalgorithm.It is shown that only O(j)of backtrack consumption is needed in...
    A Substitution Based Model for the Implementation of PROLOG——The Design and Implementation of LPROLOG
    Chen Zhaoxiong; Gao Qingshi;
    Journal of Data Acquisition and Processing, 1986, 1 (4): 17-26. 
    Abstract   PDF(420KB) ( 1257 )  
    Since PROLOG has been chosen as the Fifth Generation Computer s Kernal Language,it is presently one of the hottest topics among computer scientists all over the world.Recently,the implementation technique and the application of PROLOG have been developed rapidly.In this paper,a new implementation scheme for PROLOG is proposed.The scheme is based on the substitution of instantiated veriable values.It has many advantages,such as a higher running speed,less main memory requirement,and easier to be implemented....
    A Parallel Implementation Model of HPARLOG
    Huang Heyan;
    Journal of Data Acquisition and Processing, 1986, 1 (4): 27-38. 
    Abstract   PDF(516KB) ( 1050 )  
    In this paper,a new parallel logic programming language——HPARLOG developed by us is described,and a new scheme for the AND-parallelism implementation in logic programming language is proposed.This scheme not only resolves the instantiation conflict on sharing- variables,thoroughly explores the parallelism of the programs with incrementally constructed data structure,but also decreases the dynamic complexity of the programs.In addition,a pscudo-copy based memory management scheme to enhance the locality of g…
    The Design and Implementation of the Syntax-Directed Editor Generator(SEG)
    Zheng Guoliang; Li Hui;
    Journal of Data Acquisition and Processing, 1986, 1 (4): 39-48. 
    Abstract   PDF(468KB) ( 1182 )  
    SEG is a syntax-directed editor generator consisting of three parts:Meta,a meta language which describes BNF-like syntax;a parser,which parses the syntax descriptions written in Meta and generates their driver tables;a syntax-directed editor,which performs editing operations using a table.Similar to its ancestors(e.g.CPS,Gandalf),SEG is characterized by the following features:i)it is for a variety of languages so that the editor of a specific language can be easily produced;ii)multifile can be edited in mul…
    Generalized Parallel Signature Analyzers with External Exclusive-OR Gates
    Shen Li; Stephen Y.H.Su;
    Journal of Data Acquisition and Processing, 1986, 1 (4): 49-61. 
    Abstract   PDF(569KB) ( 1056 )  
    A new generalized parallel signature analyzer with external Exclusive-OR gates(GPSA-EE)is presented.It allows the signature analyzer to have twice the number of inputs compared with an original parallel signature analyzer.The equivalence between a GPSA-EE and an SSA-EE(serial signature analyzer)is established.Using the concept of multiple signatures,the error detection capability of signature analyzer can be enhanced by changing the connection between signature analyzer and circuit-under-test, or changing t…
    A Built-in Test Pattern Generator
    Min Yinghua; Han Zhide;
    Journal of Data Acquisition and Processing, 1986, 1 (4): 62-74. 
    Abstract   PDF(244KB) ( 1364 )  
    Built-in testing is currently of more concern due to the difficulties in testing a VLSI by using an external tester.In addition,Built-In Testing is also necessary for on-line testing and a fault-tolerant computing system.Using a Linear Feedback Shift Register(LFSR)as a built-in test pattern generator(BITPG)is a realistic and simple approach.An LFSR with maximum length can generate pseudo-random test patterns or all non-null vectors for exhaustive testing. This paper presents an LFSR design with non-maximum …
    A Computer System for Chinese Character Speech Input
    Huang Xuedong; Cai Lianhong; Fang Ditang; Chi Bianjin; Zhou Li; Jiang Li;
    Journal of Data Acquisition and Processing, 1986, 1 (4): 75-83. 
    Abstract   PDF(359KB) ( 1334 )  
    In this paper,we introduce a speaker-dependent isolated word recognizer which is dedicated for Chinese character input.The method presented here offers an effective solution to the large-vocabulary recognition problem by carrying out recognition hierachically.The vocabulary consists of 800 to 1000 words.The average recognition rate is 90% when monosyllable words takes up one third of the vocabulary.Recognition rate can reach 95% by selecting from the top 20 candidates.
    Simplification of Multivalued Sequential SULM Network by Using Cascade Decomposition
    Xu Xiaoshu;
    Journal of Data Acquisition and Processing, 1986, 1 (4): 84-95. 
    Abstract   PDF(476KB) ( 1186 )  
    An efficient method for simplifying a multivalued SULM network is presented in this aper.This method employs a cascade decomposition on a multivalued sequential machine M. At first we decompose M into two simpler machines M/π and M′.Instead of the traditional normal tree type network,a simpler SULM network that can realize M can be constructed by cascading M/π and M′.
SCImago Journal & Country Rank

ISSN 1004-9037


Editorial Board
Author Guidelines
Journal of Data Acquisition and Processing
Institute of Computing Technology, Chinese Academy of Sciences
P.O. Box 2704, Beijing 100190 P.R. China

E-mail: info@sjcjycl.cn
  Copyright ©2015 JCST, All Rights Reserved